This lab report showcases the design and implementation of a stopwatch system that accurately displays elapsed time on a set of seven-segment displays. With a precision of 1/100 of a second, the stopwatch can count up to 99.99 seconds. The project's objective was to create a sequential digital system that incrementally counts time whenever a designated button is pressed, while also providing the ability to reset the stopwatch to 0 using another button.

Throughout the report, I will provide a detailed account of the design process, starting from functional specifications and culminating in a functional stopwatch system. I will highlight the application of hierarchical design techniques, enabling the construction of complex synchronous sequential logic circuits. The implementation phase will encompass the development of the stopwatch using the SystemVerilog hardware description language.

To ensure the accuracy and reliability of the stopwatch system, a comprehensive testing and verification procedure was employed. The report will outline the various testing methodologies utilized to validate the system's functionality, ensuring that it meets the intended specifications.

By documenting this lab project, my aim is to demonstrate my proficiency in designing sequential digital systems, utilizing functional specifications as the foundation for the design process. Furthermore, this project has provided me with hands-on experience in building complex synchronous sequential logic circuits and effectively debugging them.

Overall, this lab report serves as a testament to my ability to conceptualize, design, and implement intricate digital systems while showcasing my knowledge of hierarchical design principles and verification techniques.